;CodeVisionAVR C Compiler V2.05.3 Standard ;(C) Copyright 1998-2011 Pavel Haiduc, HP InfoTech s.r.l. ;http://www.hpinfotech.com ;Chip type : ATmega16 ;Program type : Application ;Clock frequency : 1.000000 MHz ;Memory model : Small ;Optimize for : Size ;(s)printf features : int, width ;(s)scanf features : int, width ;External RAM size : 0 ;Data Stack size : 256 byte(s) ;Heap size : 0 byte(s) ;Promote 'char' to 'int' : No ;'char' is unsigned : Yes ;8 bit enums : Yes ;Global 'const' stored in FLASH : No ;Enhanced function parameter passing: Yes ;Enhanced core instructions : On ;Smart register allocation : On ;Automatic register allocation : On #pragma AVRPART ADMIN PART_NAME ATmega16 #pragma AVRPART MEMORY PROG_FLASH 16384 #pragma AVRPART MEMORY EEPROM 512 #pragma AVRPART MEMORY INT_SRAM SIZE 1119 #pragma AVRPART MEMORY INT_SRAM START_ADDR 0x60 #define CALL_SUPPORTED 1 .LISTMAC .EQU UDRE=0x5 .EQU RXC=0x7 .EQU USR=0xB .EQU UDR=0xC .EQU SPSR=0xE .EQU SPDR=0xF .EQU EERE=0x0 .EQU EEWE=0x1 .EQU EEMWE=0x2 .EQU EECR=0x1C .EQU EEDR=0x1D .EQU EEARL=0x1E .EQU EEARH=0x1F .EQU WDTCR=0x21 .EQU MCUCR=0x35 .EQU GICR=0x3B .EQU SPL=0x3D .EQU SPH=0x3E .EQU SREG=0x3F .DEF R0X0=R0 .DEF R0X1=R1 .DEF R0X2=R2 .DEF R0X3=R3 .DEF R0X4=R4 .DEF R0X5=R5 .DEF R0X6=R6 .DEF R0X7=R7 .DEF R0X8=R8 .DEF R0X9=R9 .DEF R0XA=R10 .DEF R0XB=R11 .DEF R0XC=R12 .DEF R0XD=R13 .DEF R0XE=R14 .DEF R0XF=R15 .DEF R0X10=R16 .DEF R0X11=R17 .DEF R0X12=R18 .DEF R0X13=R19 .DEF R0X14=R20 .DEF R0X15=R21 .DEF R0X16=R22 .DEF R0X17=R23 .DEF R0X18=R24 .DEF R0X19=R25 .DEF R0X1A=R26 .DEF R0X1B=R27 .DEF R0X1C=R28 .DEF R0X1D=R29 .DEF R0X1E=R30 .DEF R0X1F=R31 .EQU __SRAM_START=0x0060 .EQU __SRAM_END=0x045F .EQU __DSTACK_SIZE=0x0100 .EQU __HEAP_SIZE=0x0000 .EQU __CLEAR_SRAM_SIZE=__SRAM_END-__SRAM_START+1 .MACRO __CPD1N CPI R30,LOW(@0) LDI R26,HIGH(@0) CPC R31,R26 LDI R26,BYTE3(@0) CPC R22,R26 LDI R26,BYTE4(@0) CPC R23,R26 .ENDM .MACRO __CPD2N CPI R26,LOW(@0) LDI R30,HIGH(@0) CPC R27,R30 LDI R30,BYTE3(@0) CPC R24,R30 LDI R30,BYTE4(@0) CPC R25,R30 .ENDM .MACRO __CPWRR CP R@0,R@2 CPC R@1,R@3 .ENDM .MACRO __CPWRN CPI R@0,LOW(@2) LDI R30,HIGH(@2) CPC R@1,R30 .ENDM .MACRO __ADDB1MN SUBI R30,LOW(-@0-(@1)) .ENDM .MACRO __ADDB2MN SUBI R26,LOW(-@0-(@1)) .ENDM .MACRO __ADDW1MN SUBI R30,LOW(-@0-(@1)) SBCI R31,HIGH(-@0-(@1)) .ENDM .MACRO __ADDW2MN SUBI R26,LOW(-@0-(@1)) SBCI R27,HIGH(-@0-(@1)) .ENDM .MACRO __ADDW1FN SUBI R30,LOW(-2*@0-(@1)) SBCI R31,HIGH(-2*@0-(@1)) .ENDM .MACRO __ADDD1FN SUBI R30,LOW(-2*@0-(@1)) SBCI R31,HIGH(-2*@0-(@1)) SBCI R22,BYTE3(-2*@0-(@1)) .ENDM .MACRO __ADDD1N SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) SBCI R22,BYTE3(-@0) SBCI R23,BYTE4(-@0) .ENDM .MACRO __ADDD2N SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) SBCI R24,BYTE3(-@0) SBCI R25,BYTE4(-@0) .ENDM .MACRO __SUBD1N SUBI R30,LOW(@0) SBCI R31,HIGH(@0) SBCI R22,BYTE3(@0) SBCI R23,BYTE4(@0) .ENDM .MACRO __SUBD2N SUBI R26,LOW(@0) SBCI R27,HIGH(@0) SBCI R24,BYTE3(@0) SBCI R25,BYTE4(@0) .ENDM .MACRO __ANDBMNN LDS R30,@0+(@1) ANDI R30,LOW(@2) STS @0+(@1),R30 .ENDM .MACRO __ANDWMNN LDS R30,@0+(@1) ANDI R30,LOW(@2) STS @0+(@1),R30 LDS R30,@0+(@1)+1 ANDI R30,HIGH(@2) STS @0+(@1)+1,R30 .ENDM .MACRO __ANDD1N ANDI R30,LOW(@0) ANDI R31,HIGH(@0) ANDI R22,BYTE3(@0) ANDI R23,BYTE4(@0) .ENDM .MACRO __ANDD2N ANDI R26,LOW(@0) ANDI R27,HIGH(@0) ANDI R24,BYTE3(@0) ANDI R25,BYTE4(@0) .ENDM .MACRO __ORBMNN LDS R30,@0+(@1) ORI R30,LOW(@2) STS @0+(@1),R30 .ENDM .MACRO __ORWMNN LDS R30,@0+(@1) ORI R30,LOW(@2) STS @0+(@1),R30 LDS R30,@0+(@1)+1 ORI R30,HIGH(@2) STS @0+(@1)+1,R30 .ENDM .MACRO __ORD1N ORI R30,LOW(@0) ORI R31,HIGH(@0) ORI R22,BYTE3(@0) ORI R23,BYTE4(@0) .ENDM .MACRO __ORD2N ORI R26,LOW(@0) ORI R27,HIGH(@0) ORI R24,BYTE3(@0) ORI R25,BYTE4(@0) .ENDM .MACRO __DELAY_USB LDI R24,LOW(@0) __DELAY_USB_LOOP: DEC R24 BRNE __DELAY_USB_LOOP .ENDM .MACRO __DELAY_USW LDI R24,LOW(@0) LDI R25,HIGH(@0) __DELAY_USW_LOOP: SBIW R24,1 BRNE __DELAY_USW_LOOP .ENDM .MACRO __GETD1S LDD R30,Y+@0 LDD R31,Y+@0+1 LDD R22,Y+@0+2 LDD R23,Y+@0+3 .ENDM .MACRO __GETD2S LDD R26,Y+@0 LDD R27,Y+@0+1 LDD R24,Y+@0+2 LDD R25,Y+@0+3 .ENDM .MACRO __PUTD1S STD Y+@0,R30 STD Y+@0+1,R31 STD Y+@0+2,R22 STD Y+@0+3,R23 .ENDM .MACRO __PUTD2S STD Y+@0,R26 STD Y+@0+1,R27 STD Y+@0+2,R24 STD Y+@0+3,R25 .ENDM .MACRO __PUTDZ2 STD Z+@0,R26 STD Z+@0+1,R27 STD Z+@0+2,R24 STD Z+@0+3,R25 .ENDM .MACRO __CLRD1S STD Y+@0,R30 STD Y+@0+1,R30 STD Y+@0+2,R30 STD Y+@0+3,R30 .ENDM .MACRO __POINTB1MN LDI R30,LOW(@0+(@1)) .ENDM .MACRO __POINTW1MN LDI R30,LOW(@0+(@1)) LDI R31,HIGH(@0+(@1)) .ENDM .MACRO __POINTD1M LDI R30,LOW(@0) LDI R31,HIGH(@0) LDI R22,BYTE3(@0) LDI R23,BYTE4(@0) .ENDM .MACRO __POINTW1FN LDI R30,LOW(2*@0+(@1)) LDI R31,HIGH(2*@0+(@1)) .ENDM .MACRO __POINTD1FN LDI R30,LOW(2*@0+(@1)) LDI R31,HIGH(2*@0+(@1)) LDI R22,BYTE3(2*@0+(@1)) LDI R23,BYTE4(2*@0+(@1)) .ENDM .MACRO __POINTB2MN LDI R26,LOW(@0+(@1)) .ENDM .MACRO __POINTW2MN LDI R26,LOW(@0+(@1)) LDI R27,HIGH(@0+(@1)) .ENDM .MACRO __POINTW2FN LDI R26,LOW(2*@0+(@1)) LDI R27,HIGH(2*@0+(@1)) .ENDM .MACRO __POINTD2FN LDI R26,LOW(2*@0+(@1)) LDI R27,HIGH(2*@0+(@1)) LDI R24,BYTE3(2*@0+(@1)) LDI R25,BYTE4(2*@0+(@1)) .ENDM .MACRO __POINTBRM LDI R@0,LOW(@1) .ENDM .MACRO __POINTWRM LDI R@0,LOW(@2) LDI R@1,HIGH(@2) .ENDM .MACRO __POINTBRMN LDI R@0,LOW(@1+(@2)) .ENDM .MACRO __POINTWRMN LDI R@0,LOW(@2+(@3)) LDI R@1,HIGH(@2+(@3)) .ENDM .MACRO __POINTWRFN LDI R@0,LOW(@2*2+(@3)) LDI R@1,HIGH(@2*2+(@3)) .ENDM .MACRO __GETD1N LDI R30,LOW(@0) LDI R31,HIGH(@0) LDI R22,BYTE3(@0) LDI R23,BYTE4(@0) .ENDM .MACRO __GETD2N LDI R26,LOW(@0) LDI R27,HIGH(@0) LDI R24,BYTE3(@0) LDI R25,BYTE4(@0) .ENDM .MACRO __GETB1MN LDS R30,@0+(@1) .ENDM .MACRO __GETB1HMN LDS R31,@0+(@1) .ENDM .MACRO __GETW1MN LDS R30,@0+(@1) LDS R31,@0+(@1)+1 .ENDM .MACRO __GETD1MN LDS R30,@0+(@1) LDS R31,@0+(@1)+1 LDS R22,@0+(@1)+2 LDS R23,@0+(@1)+3 .ENDM .MACRO __GETBRMN LDS R@0,@1+(@2) .ENDM .MACRO __GETWRMN LDS R@0,@2+(@3) LDS R@1,@2+(@3)+1 .ENDM .MACRO __GETWRZ LDD R@0,Z+@2 LDD R@1,Z+@2+1 .ENDM .MACRO __GETD2Z LDD R26,Z+@0 LDD R27,Z+@0+1 LDD R24,Z+@0+2 LDD R25,Z+@0+3 .ENDM .MACRO __GETB2MN LDS R26,@0+(@1) .ENDM .MACRO __GETW2MN LDS R26,@0+(@1) LDS R27,@0+(@1)+1 .ENDM .MACRO __GETD2MN LDS R26,@0+(@1) LDS R27,@0+(@1)+1 LDS R24,@0+(@1)+2 LDS R25,@0+(@1)+3 .ENDM .MACRO __PUTB1MN STS @0+(@1),R30 .ENDM .MACRO __PUTW1MN STS @0+(@1),R30 STS @0+(@1)+1,R31 .ENDM .MACRO __PUTD1MN STS @0+(@1),R30 STS @0+(@1)+1,R31 STS @0+(@1)+2,R22 STS @0+(@1)+3,R23 .ENDM .MACRO __PUTB1EN LDI R26,LOW(@0+(@1)) LDI R27,HIGH(@0+(@1)) CALL __EEPROMWRB .ENDM .MACRO __PUTW1EN LDI R26,LOW(@0+(@1)) LDI R27,HIGH(@0+(@1)) CALL __EEPROMWRW .ENDM .MACRO __PUTD1EN LDI R26,LOW(@0+(@1)) LDI R27,HIGH(@0+(@1)) CALL __EEPROMWRD .ENDM .MACRO __PUTBR0MN STS @0+(@1),R0 .ENDM .MACRO __PUTBMRN STS @0+(@1),R@2 .ENDM .MACRO __PUTWMRN STS @0+(@1),R@2 STS @0+(@1)+1,R@3 .ENDM .MACRO __PUTBZR STD Z+@1,R@0 .ENDM .MACRO __PUTWZR STD Z+@2,R@0 STD Z+@2+1,R@1 .ENDM .MACRO __GETW1R MOV R30,R@0 MOV R31,R@1 .ENDM .MACRO __GETW2R MOV R26,R@0 MOV R27,R@1 .ENDM .MACRO __GETWRN LDI R@0,LOW(@2) LDI R@1,HIGH(@2) .ENDM .MACRO __PUTW1R MOV R@0,R30 MOV R@1,R31 .ENDM .MACRO __PUTW2R MOV R@0,R26 MOV R@1,R27 .ENDM .MACRO __ADDWRN SUBI R@0,LOW(-@2) SBCI R@1,HIGH(-@2) .ENDM .MACRO __ADDWRR ADD R@0,R@2 ADC R@1,R@3 .ENDM .MACRO __SUBWRN SUBI R@0,LOW(@2) SBCI R@1,HIGH(@2) .ENDM .MACRO __SUBWRR SUB R@0,R@2 SBC R@1,R@3 .ENDM .MACRO __ANDWRN ANDI R@0,LOW(@2) ANDI R@1,HIGH(@2) .ENDM .MACRO __ANDWRR AND R@0,R@2 AND R@1,R@3 .ENDM .MACRO __ORWRN ORI R@0,LOW(@2) ORI R@1,HIGH(@2) .ENDM .MACRO __ORWRR OR R@0,R@2 OR R@1,R@3 .ENDM .MACRO __EORWRR EOR R@0,R@2 EOR R@1,R@3 .ENDM .MACRO __GETWRS LDD R@0,Y+@2 LDD R@1,Y+@2+1 .ENDM .MACRO __PUTBSR STD Y+@1,R@0 .ENDM .MACRO __PUTWSR STD Y+@2,R@0 STD Y+@2+1,R@1 .ENDM .MACRO __MOVEWRR MOV R@0,R@2 MOV R@1,R@3 .ENDM .MACRO __INWR IN R@0,@2 IN R@1,@2+1 .ENDM .MACRO __OUTWR OUT @2+1,R@1 OUT @2,R@0 .ENDM .MACRO __CALL1MN LDS R30,@0+(@1) LDS R31,@0+(@1)+1 ICALL .ENDM .MACRO __CALL1FN LDI R30,LOW(2*@0+(@1)) LDI R31,HIGH(2*@0+(@1)) CALL __GETW1PF ICALL .ENDM .MACRO __CALL2EN LDI R26,LOW(@0+(@1)) LDI R27,HIGH(@0+(@1)) CALL __EEPROMRDW ICALL .ENDM .MACRO __GETW1STACK IN R26,SPL IN R27,SPH ADIW R26,@0+1 LD R30,X+ LD R31,X .ENDM .MACRO __GETD1STACK IN R26,SPL IN R27,SPH ADIW R26,@0+1 LD R30,X+ LD R31,X+ LD R22,X .ENDM .MACRO __NBST BST R@0,@1 IN R30,SREG LDI R31,0x40 EOR R30,R31 OUT SREG,R30 .ENDM .MACRO __PUTB1SN LDD R26,Y+@0 LDD R27,Y+@0+1 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X,R30 .ENDM .MACRO __PUTW1SN LDD R26,Y+@0 LDD R27,Y+@0+1 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1SN LDD R26,Y+@0 LDD R27,Y+@0+1 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) CALL __PUTDP1 .ENDM .MACRO __PUTB1SNS LDD R26,Y+@0 LDD R27,Y+@0+1 ADIW R26,@1 ST X,R30 .ENDM .MACRO __PUTW1SNS LDD R26,Y+@0 LDD R27,Y+@0+1 ADIW R26,@1 ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1SNS LDD R26,Y+@0 LDD R27,Y+@0+1 ADIW R26,@1 CALL __PUTDP1 .ENDM .MACRO __PUTB1PMN LDS R26,@0 LDS R27,@0+1 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X,R30 .ENDM .MACRO __PUTW1PMN LDS R26,@0 LDS R27,@0+1 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1PMN LDS R26,@0 LDS R27,@0+1 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) CALL __PUTDP1 .ENDM .MACRO __PUTB1PMNS LDS R26,@0 LDS R27,@0+1 ADIW R26,@1 ST X,R30 .ENDM .MACRO __PUTW1PMNS LDS R26,@0 LDS R27,@0+1 ADIW R26,@1 ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1PMNS LDS R26,@0 LDS R27,@0+1 ADIW R26,@1 CALL __PUTDP1 .ENDM .MACRO __PUTB1RN MOVW R26,R@0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X,R30 .ENDM .MACRO __PUTW1RN MOVW R26,R@0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1RN MOVW R26,R@0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) CALL __PUTDP1 .ENDM .MACRO __PUTB1RNS MOVW R26,R@0 ADIW R26,@1 ST X,R30 .ENDM .MACRO __PUTW1RNS MOVW R26,R@0 ADIW R26,@1 ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1RNS MOVW R26,R@0 ADIW R26,@1 CALL __PUTDP1 .ENDM .MACRO __PUTB1RON MOV R26,R@0 MOV R27,R@1 SUBI R26,LOW(-@2) SBCI R27,HIGH(-@2) ST X,R30 .ENDM .MACRO __PUTW1RON MOV R26,R@0 MOV R27,R@1 SUBI R26,LOW(-@2) SBCI R27,HIGH(-@2) ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1RON MOV R26,R@0 MOV R27,R@1 SUBI R26,LOW(-@2) SBCI R27,HIGH(-@2) CALL __PUTDP1 .ENDM .MACRO __PUTB1RONS MOV R26,R@0 MOV R27,R@1 ADIW R26,@2 ST X,R30 .ENDM .MACRO __PUTW1RONS MOV R26,R@0 MOV R27,R@1 ADIW R26,@2 ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1RONS MOV R26,R@0 MOV R27,R@1 ADIW R26,@2 CALL __PUTDP1 .ENDM .MACRO __GETB1SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) LD R30,Z .ENDM .MACRO __GETB1HSX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) LD R31,Z .ENDM .MACRO __GETW1SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) LD R0,Z+ LD R31,Z MOV R30,R0 .ENDM .MACRO __GETD1SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) LD R0,Z+ LD R1,Z+ LD R22,Z+ LD R23,Z MOVW R30,R0 .ENDM .MACRO __GETB2SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R26,X .ENDM .MACRO __GETW2SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R27,X MOV R26,R0 .ENDM .MACRO __GETD2SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R1,X+ LD R24,X+ LD R25,X MOVW R26,R0 .ENDM .MACRO __GETBRSX MOVW R30,R28 SUBI R30,LOW(-@1) SBCI R31,HIGH(-@1) LD R@0,Z .ENDM .MACRO __GETWRSX MOVW R30,R28 SUBI R30,LOW(-@2) SBCI R31,HIGH(-@2) LD R@0,Z+ LD R@1,Z .ENDM .MACRO __GETBRSX2 MOVW R26,R28 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) LD R@0,X .ENDM .MACRO __GETWRSX2 MOVW R26,R28 SUBI R26,LOW(-@2) SBCI R27,HIGH(-@2) LD R@0,X+ LD R@1,X .ENDM .MACRO __LSLW8SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) LD R31,Z CLR R30 .ENDM .MACRO __PUTB1SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) ST X,R30 .ENDM .MACRO __PUTW1SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) ST X+,R30 ST X+,R31 ST X+,R22 ST X,R23 .ENDM .MACRO __CLRW1SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) ST X+,R30 ST X,R30 .ENDM .MACRO __CLRD1SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) ST X+,R30 ST X+,R30 ST X+,R30 ST X,R30 .ENDM .MACRO __PUTB2SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) ST Z,R26 .ENDM .MACRO __PUTW2SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) ST Z+,R26 ST Z,R27 .ENDM .MACRO __PUTD2SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) ST Z+,R26 ST Z+,R27 ST Z+,R24 ST Z,R25 .ENDM .MACRO __PUTBSRX MOVW R30,R28 SUBI R30,LOW(-@1) SBCI R31,HIGH(-@1) ST Z,R@0 .ENDM .MACRO __PUTWSRX MOVW R30,R28 SUBI R30,LOW(-@2) SBCI R31,HIGH(-@2) ST Z+,R@0 ST Z,R@1 .ENDM .MACRO __PUTB1SNX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R27,X MOV R26,R0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X,R30 .ENDM .MACRO __PUTW1SNX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R27,X MOV R26,R0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1SNX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R27,X MOV R26,R0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X+,R30 ST X+,R31 ST X+,R22 ST X,R23 .ENDM .MACRO __MULBRR MULS R@0,R@1 MOVW R30,R0 .ENDM .MACRO __MULBRRU MUL R@0,R@1 MOVW R30,R0 .ENDM .MACRO __MULBRR0 MULS R@0,R@1 .ENDM .MACRO __MULBRRU0 MUL R@0,R@1 .ENDM .MACRO __MULBNWRU LDI R26,@2 MUL R26,R@0 MOVW R30,R0 MUL R26,R@1 ADD R31,R0 .ENDM ;NAME DEFINITIONS FOR GLOBAL VARIABLES ALLOCATED TO REGISTERS .DEF __lcd_x=R5 .DEF __lcd_y=R4 .DEF __lcd_maxx=R7 .CSEG .ORG 0x00 ;START OF CODE MARKER __START_OF_CODE: ;INTERRUPT VECTORS JMP __RESET JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 JMP 0x00 _tbl10_G100: .DB 0x10,0x27,0xE8,0x3,0x64,0x0,0xA,0x0 .DB 0x1,0x0 _tbl16_G100: .DB 0x0,0x10,0x0,0x1,0x10,0x0,0x1,0x0 _0x2020060: .DB 0x1 _0x2020000: .DB 0x2D,0x4E,0x41,0x4E,0x0,0x49,0x4E,0x46 .DB 0x0 _0x2040003: .DB 0x80,0xC0 __GLOBAL_INI_TBL: .DW 0x01 .DW __seed_G101 .DW _0x2020060*2 .DW 0x02 .DW __base_y_G102 .DW _0x2040003*2 _0xFFFFFFFF: .DW 0 __RESET: CLI CLR R30 OUT EECR,R30 ;INTERRUPT VECTORS ARE PLACED ;AT THE START OF FLASH LDI R31,1 OUT GICR,R31 OUT GICR,R30 OUT MCUCR,R30 ;DISABLE WATCHDOG LDI R31,0x18 OUT WDTCR,R31 OUT WDTCR,R30 ;CLEAR R2-R14 LDI R24,(14-2)+1 LDI R26,2 CLR R27 __CLEAR_REG: ST X+,R30 DEC R24 BRNE __CLEAR_REG ;CLEAR SRAM LDI R24,LOW(__CLEAR_SRAM_SIZE) LDI R25,HIGH(__CLEAR_SRAM_SIZE) LDI R26,__SRAM_START __CLEAR_SRAM: ST X+,R30 SBIW R24,1 BRNE __CLEAR_SRAM ;GLOBAL VARIABLES INITIALIZATION LDI R30,LOW(__GLOBAL_INI_TBL*2) LDI R31,HIGH(__GLOBAL_INI_TBL*2) __GLOBAL_INI_NEXT: LPM R24,Z+ LPM R25,Z+ SBIW R24,0 BREQ __GLOBAL_INI_END LPM R26,Z+ LPM R27,Z+ LPM R0,Z+ LPM R1,Z+ MOVW R22,R30 MOVW R30,R0 __GLOBAL_INI_LOOP: LPM R0,Z+ ST X+,R0 SBIW R24,1 BRNE __GLOBAL_INI_LOOP MOVW R30,R22 RJMP __GLOBAL_INI_NEXT __GLOBAL_INI_END: ;HARDWARE STACK POINTER INITIALIZATION LDI R30,LOW(__SRAM_END-__HEAP_SIZE) OUT SPL,R30 LDI R30,HIGH(__SRAM_END-__HEAP_SIZE) OUT SPH,R30 ;DATA STACK POINTER INITIALIZATION LDI R28,LOW(__SRAM_START+__DSTACK_SIZE) LDI R29,HIGH(__SRAM_START+__DSTACK_SIZE) JMP _main .ESEG .ORG 0 .DSEG .ORG 0x160 .CSEG ;/***************************************************** ;Project : Temprature Measurement with LM35 ;Author : Reza Sepas Yar ;Company : Pishro Noavaran Kavosh ;Chip type : ATmega16 ;Clock frequency : 1.000000 MHz ;*****************************************************/ ; ;#include #ifndef __SLEEP_DEFINED__ #define __SLEEP_DEFINED__ .EQU __se_bit=0x80 .EQU __sm_mask=0x70 .EQU __sm_powerdown=0x20 .EQU __sm_powersave=0x30 .EQU __sm_standby=0x60 .EQU __sm_ext_standby=0x70 .EQU __sm_adc_noise_red=0x10 .SET power_ctrl_reg=mcucr #endif ;#include ;#include ;#include ;#include ;#define ADC_VREF_TYPE 0xC0 ;// Read the AD conversion result ;unsigned int read_adc(unsigned char adc_input) ; 0000 0011 { .CSEG _read_adc: ; 0000 0012 ADMUX=adc_input|ADC_VREF_TYPE; ST -Y,R26 ; adc_input -> Y+0 LD R30,Y ORI R30,LOW(0xC0) OUT 0x7,R30 ; 0000 0013 // Start the AD conversion ; 0000 0014 ADCSRA|=0x40; SBI 0x6,6 ; 0000 0015 // Wait for the AD conversion to complete ; 0000 0016 while ((ADCSRA & 0x10)==0); _0x3: SBIS 0x6,4 RJMP _0x3 ; 0000 0017 ADCSRA|=0x10; SBI 0x6,4 ; 0000 0018 return ADCW; IN R30,0x4 IN R31,0x4+1 JMP _0x20C0002 ; 0000 0019 } ; ;void main(void) ; 0000 001C { _main: ; 0000 001D ; 0000 001E char lcd_buff[10]; ; 0000 001F int adc_in; ; 0000 0020 float temp; ; 0000 0021 ; 0000 0022 PORTA=0x00; SBIW R28,14 ; lcd_buff -> Y+4 ; adc_in -> R16,R17 ; temp -> Y+0 LDI R30,LOW(0) OUT 0x1B,R30 ; 0000 0023 DDRA=0x00; OUT 0x1A,R30 ; 0000 0024 ; 0000 0025 // ADC initialization ; 0000 0026 // ADC Clock frequency: 15.625 kHz ; 0000 0027 // ADC Voltage Reference: Int., cap. on AREF ; 0000 0028 // ADC Auto Trigger Source: None ; 0000 0029 ADMUX=ADC_VREF_TYPE; LDI R30,LOW(192) OUT 0x7,R30 ; 0000 002A ADCSRA=0x86; LDI R30,LOW(134) OUT 0x6,R30 ; 0000 002B ; 0000 002C // LCD module initialization ; 0000 002D lcd_init(16); LDI R26,LOW(16) CALL _lcd_init ; 0000 002E ; 0000 002F while (1) _0x6: ; 0000 0030 { ; 0000 0031 ; 0000 0032 adc_in=read_adc(0); LDI R26,LOW(0) RCALL _read_adc MOVW R16,R30 ; 0000 0033 temp=adc_in/4; MOVW R26,R16 LDI R30,LOW(4) LDI R31,HIGH(4) CALL __DIVW21 CALL __CWD1 CALL __CDF1 CALL __PUTD1S0 ; 0000 0034 ftoa(temp,2,lcd_buff); CALL SUBOPT_0x0 CALL __PUTPARD1 LDI R30,LOW(2) ST -Y,R30 MOVW R26,R28 ADIW R26,9 CALL _ftoa ; 0000 0035 lcd_clear(); CALL _lcd_clear ; 0000 0036 lcd_gotoxy(0,0); LDI R30,LOW(0) ST -Y,R30 LDI R26,LOW(0) CALL _lcd_gotoxy ; 0000 0037 lcd_puts(lcd_buff); MOVW R26,R28 ADIW R26,4 CALL _lcd_puts ; 0000 0038 delay_ms(1000); LDI R26,LOW(1000) LDI R27,HIGH(1000) CALL _delay_ms ; 0000 0039 ; 0000 003A }; RJMP _0x6 ; 0000 003B } _0x9: RJMP _0x9 #ifndef __SLEEP_DEFINED__ #define __SLEEP_DEFINED__ .EQU __se_bit=0x40 .EQU __sm_mask=0xB0 .EQU __sm_powerdown=0x20 .EQU __sm_powersave=0x30 .EQU __sm_standby=0xA0 .EQU __sm_ext_standby=0xB0 .EQU __sm_adc_noise_red=0x10 .SET power_ctrl_reg=mcucr #endif .CSEG .CSEG _ftoa: ST -Y,R27 ST -Y,R26 SBIW R28,4 LDI R30,LOW(0) ST Y,R30 STD Y+1,R30 STD Y+2,R30 LDI R30,LOW(63) STD Y+3,R30 ST -Y,R17 ST -Y,R16 LDD R30,Y+11 LDD R31,Y+11+1 CPI R30,LOW(0xFFFF) LDI R26,HIGH(0xFFFF) CPC R31,R26 BRNE _0x202000D CALL SUBOPT_0x1 __POINTW2FN _0x2020000,0 CALL _strcpyf RJMP _0x20C0004 _0x202000D: CPI R30,LOW(0x7FFF) LDI R26,HIGH(0x7FFF) CPC R31,R26 BRNE _0x202000C CALL SUBOPT_0x1 __POINTW2FN _0x2020000,1 CALL _strcpyf RJMP _0x20C0004 _0x202000C: LDD R26,Y+12 TST R26 BRPL _0x202000F __GETD1S 9 CALL __ANEGF1 CALL SUBOPT_0x2 CALL SUBOPT_0x3 LDI R30,LOW(45) ST X,R30 _0x202000F: LDD R26,Y+8 CPI R26,LOW(0x7) BRLO _0x2020010 LDI R30,LOW(6) STD Y+8,R30 _0x2020010: LDD R17,Y+8 _0x2020011: MOV R30,R17 SUBI R17,1 CPI R30,0 BREQ _0x2020013 CALL SUBOPT_0x4 CALL SUBOPT_0x5 CALL SUBOPT_0x6 RJMP _0x2020011 _0x2020013: CALL SUBOPT_0x7 CALL __ADDF12 CALL SUBOPT_0x2 LDI R17,LOW(0) __GETD1N 0x3F800000 CALL SUBOPT_0x6 _0x2020014: CALL SUBOPT_0x7 CALL __CMPF12 BRLO _0x2020016 CALL SUBOPT_0x4 CALL SUBOPT_0x8 CALL SUBOPT_0x6 SUBI R17,-LOW(1) CPI R17,39 BRLO _0x2020017 CALL SUBOPT_0x1 __POINTW2FN _0x2020000,5 CALL _strcpyf RJMP _0x20C0004 _0x2020017: RJMP _0x2020014 _0x2020016: CPI R17,0 BRNE _0x2020018 CALL SUBOPT_0x3 LDI R30,LOW(48) ST X,R30 RJMP _0x2020019 _0x2020018: _0x202001A: MOV R30,R17 SUBI R17,1 CPI R30,0 BREQ _0x202001C CALL SUBOPT_0x4 CALL SUBOPT_0x5 __GETD2N 0x3F000000 CALL __ADDF12 MOVW R26,R30 MOVW R24,R22 CALL _floor CALL SUBOPT_0x6 CALL SUBOPT_0x7 CALL __DIVF21 CALL __CFD1U MOV R16,R30 CALL SUBOPT_0x3 MOV R30,R16 SUBI R30,-LOW(48) ST X,R30 MOV R30,R16 CALL SUBOPT_0x4 CLR R31 CLR R22 CLR R23 CALL __CDF1 CALL __MULF12 CALL SUBOPT_0x9 CALL SUBOPT_0xA RJMP _0x202001A _0x202001C: _0x2020019: LDD R30,Y+8 CPI R30,0 BREQ _0x20C0003 CALL SUBOPT_0x3 LDI R30,LOW(46) ST X,R30 _0x202001E: LDD R30,Y+8 SUBI R30,LOW(1) STD Y+8,R30 SUBI R30,-LOW(1) BREQ _0x2020020 CALL SUBOPT_0x9 CALL SUBOPT_0x8 CALL SUBOPT_0x2 __GETD1S 9 CALL __CFD1U MOV R16,R30 CALL SUBOPT_0x3 MOV R30,R16 SUBI R30,-LOW(48) ST X,R30 MOV R30,R16 CALL SUBOPT_0x9 CLR R31 CLR R22 CLR R23 CALL __CDF1 CALL SUBOPT_0xA RJMP _0x202001E _0x2020020: _0x20C0003: LDD R26,Y+6 LDD R27,Y+6+1 LDI R30,LOW(0) ST X,R30 _0x20C0004: LDD R17,Y+1 LDD R16,Y+0 ADIW R28,13 RET .DSEG .CSEG #ifndef __SLEEP_DEFINED__ #define __SLEEP_DEFINED__ .EQU __se_bit=0x40 .EQU __sm_mask=0xB0 .EQU __sm_powerdown=0x20 .EQU __sm_powersave=0x30 .EQU __sm_standby=0xA0 .EQU __sm_ext_standby=0xB0 .EQU __sm_adc_noise_red=0x10 .SET power_ctrl_reg=mcucr #endif .DSEG .CSEG __lcd_write_nibble_G102: ST -Y,R26 IN R30,0x12 ANDI R30,LOW(0xF) MOV R26,R30 LD R30,Y ANDI R30,LOW(0xF0) OR R30,R26 OUT 0x12,R30 __DELAY_USB 1 SBI 0x12,2 __DELAY_USB 2 CBI 0x12,2 __DELAY_USB 2 RJMP _0x20C0002 __lcd_write_data: ST -Y,R26 LD R26,Y RCALL __lcd_write_nibble_G102 ld r30,y swap r30 st y,r30 LD R26,Y RCALL __lcd_write_nibble_G102 __DELAY_USB 17 RJMP _0x20C0002 _lcd_gotoxy: ST -Y,R26 LD R30,Y LDI R31,0 SUBI R30,LOW(-__base_y_G102) SBCI R31,HIGH(-__base_y_G102) LD R30,Z LDD R26,Y+1 ADD R26,R30 RCALL __lcd_write_data LDD R5,Y+1 LDD R4,Y+0 ADIW R28,2 RET _lcd_clear: LDI R26,LOW(2) CALL SUBOPT_0xB LDI R26,LOW(12) RCALL __lcd_write_data LDI R26,LOW(1) CALL SUBOPT_0xB LDI R30,LOW(0) MOV R4,R30 MOV R5,R30 RET _lcd_putchar: ST -Y,R26 LD R26,Y CPI R26,LOW(0xA) BREQ _0x2040005 CP R5,R7 BRLO _0x2040004 _0x2040005: LDI R30,LOW(0) ST -Y,R30 INC R4 MOV R26,R4 RCALL _lcd_gotoxy LD R26,Y CPI R26,LOW(0xA) BRNE _0x2040007 RJMP _0x20C0002 _0x2040007: _0x2040004: INC R5 SBI 0x12,0 LD R26,Y RCALL __lcd_write_data CBI 0x12,0 RJMP _0x20C0002 _lcd_puts: ST -Y,R27 ST -Y,R26 ST -Y,R17 _0x2040008: LDD R26,Y+1 LDD R27,Y+1+1 LD R30,X+ STD Y+1,R26 STD Y+1+1,R27 MOV R17,R30 CPI R30,0 BREQ _0x204000A MOV R26,R17 RCALL _lcd_putchar RJMP _0x2040008 _0x204000A: LDD R17,Y+0 ADIW R28,3 RET _lcd_init: ST -Y,R26 IN R30,0x11 ORI R30,LOW(0xF0) OUT 0x11,R30 SBI 0x11,2 SBI 0x11,0 SBI 0x11,1 CBI 0x12,2 CBI 0x12,0 CBI 0x12,1 LDD R7,Y+0 LD R30,Y SUBI R30,-LOW(128) __PUTB1MN __base_y_G102,2 LD R30,Y SUBI R30,-LOW(192) __PUTB1MN __base_y_G102,3 LDI R26,LOW(20) LDI R27,0 CALL _delay_ms CALL SUBOPT_0xC CALL SUBOPT_0xC CALL SUBOPT_0xC LDI R26,LOW(32) RCALL __lcd_write_nibble_G102 __DELAY_USB 33 LDI R26,LOW(40) RCALL __lcd_write_data LDI R26,LOW(4) RCALL __lcd_write_data LDI R26,LOW(133) RCALL __lcd_write_data LDI R26,LOW(6) RCALL __lcd_write_data RCALL _lcd_clear _0x20C0002: ADIW R28,1 RET .CSEG .CSEG _strcpyf: ST -Y,R27 ST -Y,R26 ld r30,y+ ld r31,y+ ld r26,y+ ld r27,y+ movw r24,r26 strcpyf0: lpm r0,z+ st x+,r0 tst r0 brne strcpyf0 movw r30,r24 ret .CSEG _ftrunc: CALL __PUTPARD2 ldd r23,y+3 ldd r22,y+2 ldd r31,y+1 ld r30,y bst r23,7 lsl r23 sbrc r22,7 sbr r23,1 mov r25,r23 subi r25,0x7e breq __ftrunc0 brcs __ftrunc0 cpi r25,24 brsh __ftrunc1 clr r26 clr r27 clr r24 __ftrunc2: sec ror r24 ror r27 ror r26 dec r25 brne __ftrunc2 and r30,r26 and r31,r27 and r22,r24 rjmp __ftrunc1 __ftrunc0: clt clr r23 clr r30 clr r31 clr r22 __ftrunc1: cbr r22,0x80 lsr r23 brcc __ftrunc3 sbr r22,0x80 __ftrunc3: bld r23,7 ld r26,y+ ld r27,y+ ld r24,y+ ld r25,y+ cp r30,r26 cpc r31,r27 cpc r22,r24 cpc r23,r25 bst r25,7 ret _floor: CALL __PUTPARD2 CALL __GETD2S0 CALL _ftrunc CALL __PUTD1S0 brne __floor1 __floor0: RCALL SUBOPT_0x0 RJMP _0x20C0001 __floor1: brtc __floor0 RCALL SUBOPT_0x0 __GETD2N 0x3F800000 CALL __SUBF12 _0x20C0001: ADIW R28,4 RET .DSEG __seed_G101: .BYTE 0x4 __base_y_G102: .BYTE 0x4 .CSEG ;OPTIMIZER ADDED SUBROUTINE, CALLED 3 TIMES, CODE SIZE REDUCTION:1 WORDS SUBOPT_0x0: CALL __GETD1S0 RET ;OPTIMIZER ADDED SUBROUTINE, CALLED 3 TIMES, CODE SIZE REDUCTION:1 WORDS SUBOPT_0x1: LDD R30,Y+6 LDD R31,Y+6+1 ST -Y,R31 ST -Y,R30 RET ;OPTIMIZER ADDED SUBROUTINE, CALLED 5 TIMES, CODE SIZE REDUCTION:5 WORDS SUBOPT_0x2: __PUTD1S 9 RET ;OPTIMIZER ADDED SUBROUTINE, CALLED 5 TIMES, CODE SIZE REDUCTION:13 WORDS SUBOPT_0x3: LDD R26,Y+6 LDD R27,Y+6+1 ADIW R26,1 STD Y+6,R26 STD Y+6+1,R27 SBIW R26,1 RET ;OPTIMIZER ADDED SUBROUTINE, CALLED 4 TIMES, CODE SIZE REDUCTION:3 WORDS SUBOPT_0x4: __GETD2S 2 RET ;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES, CODE SIZE REDUCTION:1 WORDS SUBOPT_0x5: __GETD1N 0x3DCCCCCD CALL __MULF12 RET ;OPTIMIZER ADDED SUBROUTINE, CALLED 4 TIMES, CODE SIZE REDUCTION:3 WORDS SUBOPT_0x6: __PUTD1S 2 RET ;OPTIMIZER ADDED SUBROUTINE, CALLED 3 TIMES, CODE SIZE REDUCTION:9 WORDS SUBOPT_0x7: __GETD1S 2 __GETD2S 9 RET ;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES, CODE SIZE REDUCTION:1 WORDS SUBOPT_0x8: __GETD1N 0x41200000 CALL __MULF12 RET ;OPTIMIZER ADDED SUBROUTINE, CALLED 3 TIMES, CODE SIZE REDUCTION:1 WORDS SUBOPT_0x9: __GETD2S 9 RET ;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES, CODE SIZE REDUCTION:1 WORDS SUBOPT_0xA: CALL __SWAPD12 CALL __SUBF12 RJMP SUBOPT_0x2 ;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES, CODE SIZE REDUCTION:3 WORDS SUBOPT_0xB: CALL __lcd_write_data LDI R26,LOW(3) LDI R27,0 JMP _delay_ms ;OPTIMIZER ADDED SUBROUTINE, CALLED 3 TIMES, CODE SIZE REDUCTION:5 WORDS SUBOPT_0xC: LDI R26,LOW(48) CALL __lcd_write_nibble_G102 __DELAY_USB 33 RET .CSEG _delay_ms: adiw r26,0 breq __delay_ms1 __delay_ms0: __DELAY_USW 0xFA wdr sbiw r26,1 brne __delay_ms0 __delay_ms1: ret __ANEGF1: SBIW R30,0 SBCI R22,0 SBCI R23,0 BREQ __ANEGF10 SUBI R23,0x80 __ANEGF10: RET __ROUND_REPACK: TST R21 BRPL __REPACK CPI R21,0x80 BRNE __ROUND_REPACK0 SBRS R30,0 RJMP __REPACK __ROUND_REPACK0: ADIW R30,1 ADC R22,R25 ADC R23,R25 BRVS __REPACK1 __REPACK: LDI R21,0x80 EOR R21,R23 BRNE __REPACK0 PUSH R21 RJMP __ZERORES __REPACK0: CPI R21,0xFF BREQ __REPACK1 LSL R22 LSL R0 ROR R21 ROR R22 MOV R23,R21 RET __REPACK1: PUSH R21 TST R0 BRMI __REPACK2 RJMP __MAXRES __REPACK2: RJMP __MINRES __UNPACK: LDI R21,0x80 MOV R1,R25 AND R1,R21 LSL R24 ROL R25 EOR R25,R21 LSL R21 ROR R24 __UNPACK1: LDI R21,0x80 MOV R0,R23 AND R0,R21 LSL R22 ROL R23 EOR R23,R21 LSL R21 ROR R22 RET __CFD1U: SET RJMP __CFD1U0 __CFD1: CLT __CFD1U0: PUSH R21 RCALL __UNPACK1 CPI R23,0x80 BRLO __CFD10 CPI R23,0xFF BRCC __CFD10 RJMP __ZERORES __CFD10: LDI R21,22 SUB R21,R23 BRPL __CFD11 NEG R21 CPI R21,8 BRTC __CFD19 CPI R21,9 __CFD19: BRLO __CFD17 SER R30 SER R31 SER R22 LDI R23,0x7F BLD R23,7 RJMP __CFD15 __CFD17: CLR R23 TST R21 BREQ __CFD15 __CFD18: LSL R30 ROL R31 ROL R22 ROL R23 DEC R21 BRNE __CFD18 RJMP __CFD15 __CFD11: CLR R23 __CFD12: CPI R21,8 BRLO __CFD13 MOV R30,R31 MOV R31,R22 MOV R22,R23 SUBI R21,8 RJMP __CFD12 __CFD13: TST R21 BREQ __CFD15 __CFD14: LSR R23 ROR R22 ROR R31 ROR R30 DEC R21 BRNE __CFD14 __CFD15: TST R0 BRPL __CFD16 RCALL __ANEGD1 __CFD16: POP R21 RET __CDF1U: SET RJMP __CDF1U0 __CDF1: CLT __CDF1U0: SBIW R30,0 SBCI R22,0 SBCI R23,0 BREQ __CDF10 CLR R0 BRTS __CDF11 TST R23 BRPL __CDF11 COM R0 RCALL __ANEGD1 __CDF11: MOV R1,R23 LDI R23,30 TST R1 __CDF12: BRMI __CDF13 DEC R23 LSL R30 ROL R31 ROL R22 ROL R1 RJMP __CDF12 __CDF13: MOV R30,R31 MOV R31,R22 MOV R22,R1 PUSH R21 RCALL __REPACK POP R21 __CDF10: RET __SWAPACC: PUSH R20 MOVW R20,R30 MOVW R30,R26 MOVW R26,R20 MOVW R20,R22 MOVW R22,R24 MOVW R24,R20 MOV R20,R0 MOV R0,R1 MOV R1,R20 POP R20 RET __UADD12: ADD R30,R26 ADC R31,R27 ADC R22,R24 RET __NEGMAN1: COM R30 COM R31 COM R22 SUBI R30,-1 SBCI R31,-1 SBCI R22,-1 RET __SUBF12: PUSH R21 RCALL __UNPACK CPI R25,0x80 BREQ __ADDF129 LDI R21,0x80 EOR R1,R21 RJMP __ADDF120 __ADDF12: PUSH R21 RCALL __UNPACK CPI R25,0x80 BREQ __ADDF129 __ADDF120: CPI R23,0x80 BREQ __ADDF128 __ADDF121: MOV R21,R23 SUB R21,R25 BRVS __ADDF1211 BRPL __ADDF122 RCALL __SWAPACC RJMP __ADDF121 __ADDF122: CPI R21,24 BRLO __ADDF123 CLR R26 CLR R27 CLR R24 __ADDF123: CPI R21,8 BRLO __ADDF124 MOV R26,R27 MOV R27,R24 CLR R24 SUBI R21,8 RJMP __ADDF123 __ADDF124: TST R21 BREQ __ADDF126 __ADDF125: LSR R24 ROR R27 ROR R26 DEC R21 BRNE __ADDF125 __ADDF126: MOV R21,R0 EOR R21,R1 BRMI __ADDF127 RCALL __UADD12 BRCC __ADDF129 ROR R22 ROR R31 ROR R30 INC R23 BRVC __ADDF129 RJMP __MAXRES __ADDF128: RCALL __SWAPACC __ADDF129: RCALL __REPACK POP R21 RET __ADDF1211: BRCC __ADDF128 RJMP __ADDF129 __ADDF127: SUB R30,R26 SBC R31,R27 SBC R22,R24 BREQ __ZERORES BRCC __ADDF1210 COM R0 RCALL __NEGMAN1 __ADDF1210: TST R22 BRMI __ADDF129 LSL R30 ROL R31 ROL R22 DEC R23 BRVC __ADDF1210 __ZERORES: CLR R30 CLR R31 CLR R22 CLR R23 POP R21 RET __MINRES: SER R30 SER R31 LDI R22,0x7F SER R23 POP R21 RET __MAXRES: SER R30 SER R31 LDI R22,0x7F LDI R23,0x7F POP R21 RET __MULF12: PUSH R21 RCALL __UNPACK CPI R23,0x80 BREQ __ZERORES CPI R25,0x80 BREQ __ZERORES EOR R0,R1 SEC ADC R23,R25 BRVC __MULF124 BRLT __ZERORES __MULF125: TST R0 BRMI __MINRES RJMP __MAXRES __MULF124: PUSH R0 PUSH R17 PUSH R18 PUSH R19 PUSH R20 CLR R17 CLR R18 CLR R25 MUL R22,R24 MOVW R20,R0 MUL R24,R31 MOV R19,R0 ADD R20,R1 ADC R21,R25 MUL R22,R27 ADD R19,R0 ADC R20,R1 ADC R21,R25 MUL R24,R30 RCALL __MULF126 MUL R27,R31 RCALL __MULF126 MUL R22,R26 RCALL __MULF126 MUL R27,R30 RCALL __MULF127 MUL R26,R31 RCALL __MULF127 MUL R26,R30 ADD R17,R1 ADC R18,R25 ADC R19,R25 ADC R20,R25 ADC R21,R25 MOV R30,R19 MOV R31,R20 MOV R22,R21 MOV R21,R18 POP R20 POP R19 POP R18 POP R17 POP R0 TST R22 BRMI __MULF122 LSL R21 ROL R30 ROL R31 ROL R22 RJMP __MULF123 __MULF122: INC R23 BRVS __MULF125 __MULF123: RCALL __ROUND_REPACK POP R21 RET __MULF127: ADD R17,R0 ADC R18,R1 ADC R19,R25 RJMP __MULF128 __MULF126: ADD R18,R0 ADC R19,R1 __MULF128: ADC R20,R25 ADC R21,R25 RET __DIVF21: PUSH R21 RCALL __UNPACK CPI R23,0x80 BRNE __DIVF210 TST R1 __DIVF211: BRPL __DIVF219 RJMP __MINRES __DIVF219: RJMP __MAXRES __DIVF210: CPI R25,0x80 BRNE __DIVF218 __DIVF217: RJMP __ZERORES __DIVF218: EOR R0,R1 SEC SBC R25,R23 BRVC __DIVF216 BRLT __DIVF217 TST R0 RJMP __DIVF211 __DIVF216: MOV R23,R25 PUSH R17 PUSH R18 PUSH R19 PUSH R20 CLR R1 CLR R17 CLR R18 CLR R19 CLR R20 CLR R21 LDI R25,32 __DIVF212: CP R26,R30 CPC R27,R31 CPC R24,R22 CPC R20,R17 BRLO __DIVF213 SUB R26,R30 SBC R27,R31 SBC R24,R22 SBC R20,R17 SEC RJMP __DIVF214 __DIVF213: CLC __DIVF214: ROL R21 ROL R18 ROL R19 ROL R1 ROL R26 ROL R27 ROL R24 ROL R20 DEC R25 BRNE __DIVF212 MOVW R30,R18 MOV R22,R1 POP R20 POP R19 POP R18 POP R17 TST R22 BRMI __DIVF215 LSL R21 ROL R30 ROL R31 ROL R22 DEC R23 BRVS __DIVF217 __DIVF215: RCALL __ROUND_REPACK POP R21 RET __CMPF12: TST R25 BRMI __CMPF120 TST R23 BRMI __CMPF121 CP R25,R23 BRLO __CMPF122 BRNE __CMPF121 CP R26,R30 CPC R27,R31 CPC R24,R22 BRLO __CMPF122 BREQ __CMPF123 __CMPF121: CLZ CLC RET __CMPF122: CLZ SEC RET __CMPF123: SEZ CLC RET __CMPF120: TST R23 BRPL __CMPF122 CP R25,R23 BRLO __CMPF121 BRNE __CMPF122 CP R30,R26 CPC R31,R27 CPC R22,R24 BRLO __CMPF122 BREQ __CMPF123 RJMP __CMPF121 __ANEGW1: NEG R31 NEG R30 SBCI R31,0 RET __ANEGD1: COM R31 COM R22 COM R23 NEG R30 SBCI R31,-1 SBCI R22,-1 SBCI R23,-1 RET __CBD1: MOV R31,R30 ADD R31,R31 SBC R31,R31 MOV R22,R31 MOV R23,R31 RET __CWD1: MOV R22,R31 ADD R22,R22 SBC R22,R22 MOV R23,R22 RET __DIVW21U: CLR R0 CLR R1 LDI R25,16 __DIVW21U1: LSL R26 ROL R27 ROL R0 ROL R1 SUB R0,R30 SBC R1,R31 BRCC __DIVW21U2 ADD R0,R30 ADC R1,R31 RJMP __DIVW21U3 __DIVW21U2: SBR R26,1 __DIVW21U3: DEC R25 BRNE __DIVW21U1 MOVW R30,R26 MOVW R26,R0 RET __DIVW21: RCALL __CHKSIGNW RCALL __DIVW21U BRTC __DIVW211 RCALL __ANEGW1 __DIVW211: RET __CHKSIGNW: CLT SBRS R31,7 RJMP __CHKSW1 RCALL __ANEGW1 SET __CHKSW1: SBRS R27,7 RJMP __CHKSW2 COM R26 COM R27 ADIW R26,1 BLD R0,0 INC R0 BST R0,0 __CHKSW2: RET __GETD1S0: LD R30,Y LDD R31,Y+1 LDD R22,Y+2 LDD R23,Y+3 RET __GETD2S0: LD R26,Y LDD R27,Y+1 LDD R24,Y+2 LDD R25,Y+3 RET __PUTD1S0: ST Y,R30 STD Y+1,R31 STD Y+2,R22 STD Y+3,R23 RET __PUTPARD1: ST -Y,R23 ST -Y,R22 ST -Y,R31 ST -Y,R30 RET __PUTPARD2: ST -Y,R25 ST -Y,R24 ST -Y,R27 ST -Y,R26 RET __SWAPD12: MOV R1,R24 MOV R24,R22 MOV R22,R1 MOV R1,R25 MOV R25,R23 MOV R23,R1 __SWAPW12: MOV R1,R27 MOV R27,R31 MOV R31,R1 __SWAPB12: MOV R1,R26 MOV R26,R30 MOV R30,R1 RET ;END OF CODE MARKER __END_OF_CODE: