;CodeVisionAVR C Compiler V1.24.4 Standard ;(C) Copyright 1998-2004 Pavel Haiduc, HP InfoTech s.r.l. ;http://www.hpinfotech.com ;e-mail:office@hpinfotech.com ;Chip type : ATmega16 ;Program type : Application ;Clock frequency : 8.000000 MHz ;Memory model : Small ;Optimize for : Size ;(s)printf features : int, width ;(s)scanf features : int, width ;External SRAM size : 0 ;Data Stack size : 256 byte(s) ;Heap size : 0 byte(s) ;Promote char to int : No ;char is unsigned : Yes ;8 bit enums : No ;Enhanced core instructions : On ;Automatic register allocation : On .EQU UDRE=0x5 .EQU RXC=0x7 .EQU USR=0xB .EQU UDR=0xC .EQU SPSR=0xE .EQU SPDR=0xF .EQU EERE=0x0 .EQU EEWE=0x1 .EQU EEMWE=0x2 .EQU EECR=0x1C .EQU EEDR=0x1D .EQU EEARL=0x1E .EQU EEARH=0x1F .EQU WDTCR=0x21 .EQU MCUCR=0x35 .EQU GICR=0x3B .EQU SPL=0x3D .EQU SPH=0x3E .EQU SREG=0x3F .DEF R0X0=R0 .DEF R0X1=R1 .DEF R0X2=R2 .DEF R0X3=R3 .DEF R0X4=R4 .DEF R0X5=R5 .DEF R0X6=R6 .DEF R0X7=R7 .DEF R0X8=R8 .DEF R0X9=R9 .DEF R0XA=R10 .DEF R0XB=R11 .DEF R0XC=R12 .DEF R0XD=R13 .DEF R0XE=R14 .DEF R0XF=R15 .DEF R0X10=R16 .DEF R0X11=R17 .DEF R0X12=R18 .DEF R0X13=R19 .DEF R0X14=R20 .DEF R0X15=R21 .DEF R0X16=R22 .DEF R0X17=R23 .DEF R0X18=R24 .DEF R0X19=R25 .DEF R0X1A=R26 .DEF R0X1B=R27 .DEF R0X1C=R28 .DEF R0X1D=R29 .DEF R0X1E=R30 .DEF R0X1F=R31 .EQU __se_bit=0x40 .EQU __sm_mask=0xB0 .EQU __sm_adc_noise_red=0x10 .EQU __sm_powerdown=0x20 .EQU __sm_powersave=0x30 .EQU __sm_standby=0xA0 .EQU __sm_ext_standby=0xB0 .MACRO __CPD1N CPI R30,LOW(@0) LDI R26,HIGH(@0) CPC R31,R26 LDI R26,BYTE3(@0) CPC R22,R26 LDI R26,BYTE4(@0) CPC R23,R26 .ENDM .MACRO __CPD2N CPI R26,LOW(@0) LDI R30,HIGH(@0) CPC R27,R30 LDI R30,BYTE3(@0) CPC R24,R30 LDI R30,BYTE4(@0) CPC R25,R30 .ENDM .MACRO __CPWRR CP R@0,R@2 CPC R@1,R@3 .ENDM .MACRO __CPWRN CPI R@0,LOW(@2) LDI R30,HIGH(@2) CPC R@1,R30 .ENDM .MACRO __ADDD1N SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) SBCI R22,BYTE3(-@0) SBCI R23,BYTE4(-@0) .ENDM .MACRO __ADDD2N SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) SBCI R24,BYTE3(-@0) SBCI R25,BYTE4(-@0) .ENDM .MACRO __SUBD1N SUBI R30,LOW(@0) SBCI R31,HIGH(@0) SBCI R22,BYTE3(@0) SBCI R23,BYTE4(@0) .ENDM .MACRO __SUBD2N SUBI R26,LOW(@0) SBCI R27,HIGH(@0) SBCI R24,BYTE3(@0) SBCI R25,BYTE4(@0) .ENDM .MACRO __ANDD1N ANDI R30,LOW(@0) ANDI R31,HIGH(@0) ANDI R22,BYTE3(@0) ANDI R23,BYTE4(@0) .ENDM .MACRO __ORD1N ORI R30,LOW(@0) ORI R31,HIGH(@0) ORI R22,BYTE3(@0) ORI R23,BYTE4(@0) .ENDM .MACRO __DELAY_USB LDI R24,LOW(@0) __DELAY_USB_LOOP: DEC R24 BRNE __DELAY_USB_LOOP .ENDM .MACRO __DELAY_USW LDI R24,LOW(@0) LDI R25,HIGH(@0) __DELAY_USW_LOOP: SBIW R24,1 BRNE __DELAY_USW_LOOP .ENDM .MACRO __CLRD1S LDI R30,0 STD Y+@0,R30 STD Y+@0+1,R30 STD Y+@0+2,R30 STD Y+@0+3,R30 .ENDM .MACRO __GETD1S LDD R30,Y+@0 LDD R31,Y+@0+1 LDD R22,Y+@0+2 LDD R23,Y+@0+3 .ENDM .MACRO __PUTD1S STD Y+@0,R30 STD Y+@0+1,R31 STD Y+@0+2,R22 STD Y+@0+3,R23 .ENDM .MACRO __POINTB1MN LDI R30,LOW(@0+@1) .ENDM .MACRO __POINTW1MN LDI R30,LOW(@0+@1) LDI R31,HIGH(@0+@1) .ENDM .MACRO __POINTW1FN LDI R30,LOW(2*@0+@1) LDI R31,HIGH(2*@0+@1) .ENDM .MACRO __POINTB2MN LDI R26,LOW(@0+@1) .ENDM .MACRO __POINTW2MN LDI R26,LOW(@0+@1) LDI R27,HIGH(@0+@1) .ENDM .MACRO __POINTBRM LDI R@0,LOW(@1) .ENDM .MACRO __POINTWRM LDI R@0,LOW(@2) LDI R@1,HIGH(@2) .ENDM .MACRO __POINTBRMN LDI R@0,LOW(@1+@2) .ENDM .MACRO __POINTWRMN LDI R@0,LOW(@2+@3) LDI R@1,HIGH(@2+@3) .ENDM .MACRO __GETD1N LDI R30,LOW(@0) LDI R31,HIGH(@0) LDI R22,BYTE3(@0) LDI R23,BYTE4(@0) .ENDM .MACRO __GETD2N LDI R26,LOW(@0) LDI R27,HIGH(@0) LDI R24,BYTE3(@0) LDI R25,BYTE4(@0) .ENDM .MACRO __GETD2S LDD R26,Y+@0 LDD R27,Y+@0+1 LDD R24,Y+@0+2 LDD R25,Y+@0+3 .ENDM .MACRO __GETB1MN LDS R30,@0+@1 .ENDM .MACRO __GETW1MN LDS R30,@0+@1 LDS R31,@0+@1+1 .ENDM .MACRO __GETD1MN LDS R30,@0+@1 LDS R31,@0+@1+1 LDS R22,@0+@1+2 LDS R23,@0+@1+3 .ENDM .MACRO __GETBRMN LDS R@2,@0+@1 .ENDM .MACRO __GETWRMN LDS R@2,@0+@1 LDS R@3,@0+@1+1 .ENDM .MACRO __GETWRZ LDD R@0,Z+@2 LDD R@1,Z+@2+1 .ENDM .MACRO __GETB2MN LDS R26,@0+@1 .ENDM .MACRO __GETW2MN LDS R26,@0+@1 LDS R27,@0+@1+1 .ENDM .MACRO __GETD2MN LDS R26,@0+@1 LDS R27,@0+@1+1 LDS R24,@0+@1+2 LDS R25,@0+@1+3 .ENDM .MACRO __PUTB1MN STS @0+@1,R30 .ENDM .MACRO __PUTW1MN STS @0+@1,R30 STS @0+@1+1,R31 .ENDM .MACRO __PUTD1MN STS @0+@1,R30 STS @0+@1+1,R31 STS @0+@1+2,R22 STS @0+@1+3,R23 .ENDM .MACRO __PUTDZ2 STD Z+@0,R26 STD Z+@0+1,R27 STD Z+@0+2,R24 STD Z+@0+3,R25 .ENDM .MACRO __PUTBMRN STS @0+@1,R@2 .ENDM .MACRO __PUTWMRN STS @0+@1,R@2 STS @0+@1+1,R@3 .ENDM .MACRO __PUTBZR STD Z+@1,R@0 .ENDM .MACRO __PUTWZR STD Z+@2,R@0 STD Z+@2+1,R@1 .ENDM .MACRO __GETW1R MOV R30,R@0 MOV R31,R@1 .ENDM .MACRO __GETW2R MOV R26,R@0 MOV R27,R@1 .ENDM .MACRO __GETWRN LDI R@0,LOW(@2) LDI R@1,HIGH(@2) .ENDM .MACRO __PUTW1R MOV R@0,R30 MOV R@1,R31 .ENDM .MACRO __PUTW2R MOV R@0,R26 MOV R@1,R27 .ENDM .MACRO __ADDWRN SUBI R@0,LOW(-@2) SBCI R@1,HIGH(-@2) .ENDM .MACRO __ADDWRR ADD R@0,R@2 ADC R@1,R@3 .ENDM .MACRO __SUBWRN SUBI R@0,LOW(@2) SBCI R@1,HIGH(@2) .ENDM .MACRO __SUBWRR SUB R@0,R@2 SBC R@1,R@3 .ENDM .MACRO __ANDWRN ANDI R@0,LOW(@2) ANDI R@1,HIGH(@2) .ENDM .MACRO __ANDWRR AND R@0,R@2 AND R@1,R@3 .ENDM .MACRO __ORWRN ORI R@0,LOW(@2) ORI R@1,HIGH(@2) .ENDM .MACRO __ORWRR OR R@0,R@2 OR R@1,R@3 .ENDM .MACRO __EORWRR EOR R@0,R@2 EOR R@1,R@3 .ENDM .MACRO __GETWRS LDD R@0,Y+@2 LDD R@1,Y+@2+1 .ENDM .MACRO __PUTWSR STD Y+@2,R@0 STD Y+@2+1,R@1 .ENDM .MACRO __MOVEWRR MOV R@0,R@2 MOV R@1,R@3 .ENDM .MACRO __INWR IN R@0,@2 IN R@1,@2+1 .ENDM .MACRO __OUTWR OUT @2+1,R@1 OUT @2,R@0 .ENDM .MACRO __CALL1MN LDS R30,@0+@1 LDS R31,@0+@1+1 ICALL .ENDM .MACRO __CALL1FN LDI R30,LOW(2*@0+@1) LDI R31,HIGH(2*@0+@1) CALL __GETW1PF ICALL .ENDM .MACRO __CALL2EN LDI R26,LOW(@0+@1) LDI R27,HIGH(@0+@1) CALL __EEPROMRDW ICALL .ENDM .MACRO __GETW1STACK IN R26,SPL IN R27,SPH ADIW R26,@0+1 LD R30,X+ LD R31,X .ENDM .MACRO __NBST BST R@0,@1 IN R30,SREG LDI R31,0x40 EOR R30,R31 OUT SREG,R30 .ENDM .MACRO __PUTB1SN LDD R26,Y+@0 LDD R27,Y+@0+1 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X,R30 .ENDM .MACRO __PUTW1SN LDD R26,Y+@0 LDD R27,Y+@0+1 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1SN LDD R26,Y+@0 LDD R27,Y+@0+1 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) CALL __PUTDP1 .ENDM .MACRO __PUTB1SNS LDD R26,Y+@0 LDD R27,Y+@0+1 ADIW R26,@1 ST X,R30 .ENDM .MACRO __PUTW1SNS LDD R26,Y+@0 LDD R27,Y+@0+1 ADIW R26,@1 ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1SNS LDD R26,Y+@0 LDD R27,Y+@0+1 ADIW R26,@1 CALL __PUTDP1 .ENDM .MACRO __PUTB1PMN LDS R26,@0 LDS R27,@0+1 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X,R30 .ENDM .MACRO __PUTW1PMN LDS R26,@0 LDS R27,@0+1 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1PMN LDS R26,@0 LDS R27,@0+1 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) CALL __PUTDP1 .ENDM .MACRO __PUTB1PMNS LDS R26,@0 LDS R27,@0+1 ADIW R26,@1 ST X,R30 .ENDM .MACRO __PUTW1PMNS LDS R26,@0 LDS R27,@0+1 ADIW R26,@1 ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1PMNS LDS R26,@0 LDS R27,@0+1 ADIW R26,@1 CALL __PUTDP1 .ENDM .MACRO __PUTB1RN MOVW R26,R@0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X,R30 .ENDM .MACRO __PUTW1RN MOVW R26,R@0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1RN MOVW R26,R@0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) CALL __PUTDP1 .ENDM .MACRO __PUTB1RNS MOVW R26,R@0 ADIW R26,@1 ST X,R30 .ENDM .MACRO __PUTW1RNS MOVW R26,R@0 ADIW R26,@1 ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1RNS MOVW R26,R@0 ADIW R26,@1 CALL __PUTDP1 .ENDM .MACRO __PUTB1RON MOV R26,R@0 MOV R27,R@1 SUBI R26,LOW(-@2) SBCI R27,HIGH(-@2) ST X,R30 .ENDM .MACRO __PUTW1RON MOV R26,R@0 MOV R27,R@1 SUBI R26,LOW(-@2) SBCI R27,HIGH(-@2) ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1RON MOV R26,R@0 MOV R27,R@1 SUBI R26,LOW(-@2) SBCI R27,HIGH(-@2) CALL __PUTDP1 .ENDM .MACRO __PUTB1RONS MOV R26,R@0 MOV R27,R@1 ADIW R26,@2 ST X,R30 .ENDM .MACRO __PUTW1RONS MOV R26,R@0 MOV R27,R@1 ADIW R26,@2 ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1RONS MOV R26,R@0 MOV R27,R@1 ADIW R26,@2 CALL __PUTDP1 .ENDM .MACRO __GETB1SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) LD R30,Z .ENDM .MACRO __GETW1SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) LD R0,Z+ LD R31,Z MOV R30,R0 .ENDM .MACRO __GETD1SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) LD R0,Z+ LD R1,Z+ LD R22,Z+ LD R23,Z MOVW R30,R0 .ENDM .MACRO __GETB2SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R26,X .ENDM .MACRO __GETW2SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R27,X MOV R26,R0 .ENDM .MACRO __GETD2SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R1,X+ LD R24,X+ LD R25,X MOVW R26,R0 .ENDM .MACRO __GETBRSX MOVW R30,R28 SUBI R30,LOW(-@1) SBCI R31,HIGH(-@1) LD R@0,Z .ENDM .MACRO __GETWRSX MOVW R30,R28 SUBI R30,LOW(-@2) SBCI R31,HIGH(-@2) LD R@0,Z+ LD R@1,Z .ENDM .MACRO __LSLW8SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) LD R31,Z CLR R30 .ENDM .MACRO __PUTB1SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) ST X,R30 .ENDM .MACRO __PUTW1SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) ST X+,R30 ST X+,R31 ST X+,R22 ST X,R23 .ENDM .MACRO __CLRW1SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) CLR R0 ST Z+,R0 ST Z,R0 .ENDM .MACRO __CLRD1SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) CLR R0 ST Z+,R0 ST Z+,R0 ST Z+,R0 ST Z,R0 .ENDM .MACRO __PUTB2SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) ST Z,R26 .ENDM .MACRO __PUTW2SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) ST Z+,R26 ST Z,R27 .ENDM .MACRO __PUTBSRX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) ST Z,R@1 .ENDM .MACRO __PUTWSRX MOVW R30,R28 SUBI R30,LOW(-@2) SBCI R31,HIGH(-@2) ST Z+,R@0 ST Z,R@1 .ENDM .MACRO __PUTB1SNX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R27,X MOV R26,R0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X,R30 .ENDM .MACRO __PUTW1SNX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R27,X MOV R26,R0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1SNX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R27,X MOV R26,R0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X+,R30 ST X+,R31 ST X+,R22 ST X,R23 .ENDM .MACRO __MULBRR MULS R@0,R@1 MOV R30,R0 .ENDM .MACRO __MULBRRU MUL R@0,R@1 MOV R30,R0 .ENDM .CSEG .ORG 0 .INCLUDE "lcd1.vec" .INCLUDE "lcd1.inc" __RESET: CLI CLR R30 OUT EECR,R30 ;INTERRUPT VECTORS ARE PLACED ;AT THE START OF FLASH LDI R31,1 OUT GICR,R31 OUT GICR,R30 OUT MCUCR,R30 ;DISABLE WATCHDOG LDI R31,0x18 OUT WDTCR,R31 OUT WDTCR,R30 ;CLEAR R2-R14 LDI R24,13 LDI R26,2 CLR R27 __CLEAR_REG: ST X+,R30 DEC R24 BRNE __CLEAR_REG ;CLEAR SRAM LDI R24,LOW(0x400) LDI R25,HIGH(0x400) LDI R26,0x60 __CLEAR_SRAM: ST X+,R30 SBIW R24,1 BRNE __CLEAR_SRAM ;GLOBAL VARIABLES INITIALIZATION LDI R30,LOW(__GLOBAL_INI_TBL*2) LDI R31,HIGH(__GLOBAL_INI_TBL*2) __GLOBAL_INI_NEXT: LPM R24,Z+ LPM R25,Z+ SBIW R24,0 BREQ __GLOBAL_INI_END LPM R26,Z+ LPM R27,Z+ LPM R0,Z+ LPM R1,Z+ MOVW R22,R30 MOVW R30,R0 __GLOBAL_INI_LOOP: LPM R0,Z+ ST X+,R0 SBIW R24,1 BRNE __GLOBAL_INI_LOOP MOVW R30,R22 RJMP __GLOBAL_INI_NEXT __GLOBAL_INI_END: ;STACK POINTER INITIALIZATION LDI R30,LOW(0x45F) OUT SPL,R30 LDI R30,HIGH(0x45F) OUT SPH,R30 ;DATA STACK POINTER INITIALIZATION LDI R28,LOW(0x160) LDI R29,HIGH(0x160) JMP _main .ESEG .ORG 0 .DSEG .ORG 0x160 ; 1 ; 2 /*************************************************** ; 3 Chip type : ATmega16 ; 4 Program type : Application ; 5 Clock frequency : 8.000000 MHz ; 6 Memory model : Small ; 7 External SRAM size : 0 ; 8 Data Stack size : 256 ; 9 *****************************************************/ ; 10 ; 11 #include ; 12 #include ; 13 #include ; 14 #include ; 15 #include ; 16 ; 17 #asm ; 18 .equ __lcd_port=0x1B ;PORTA .equ __lcd_port=0x1B ;PORTA ; 19 #endasm ; 20 ; 21 int num=1385; ; 22 char str[5]; _str: .BYTE 0x5 ; 23 ; 24 void main(void) ; 25 { .CSEG _main: ; 26 ; 27 itoa(num,str); ST -Y,R5 ST -Y,R4 LDI R30,LOW(_str) LDI R31,HIGH(_str) ST -Y,R31 ST -Y,R30 CALL _itoa ; 28 ; 29 lcd_init(16); LDI R30,LOW(16) ST -Y,R30 CALL _lcd_init ; 30 ; 31 lcd_gotoxy(0,0); LDI R30,LOW(0) CALL SUBOPT_0x0 ; 32 lcd_putsf("Number="); __POINTW1FN _0,0 ST -Y,R31 ST -Y,R30 CALL _lcd_putsf ; 33 ; 34 lcd_gotoxy(7,0); LDI R30,LOW(7) CALL SUBOPT_0x0 ; 35 lcd_puts(str); LDI R30,LOW(_str) LDI R31,HIGH(_str) ST -Y,R31 ST -Y,R30 CALL _lcd_puts ; 36 ; 37 while(1); _0x4: RJMP _0x4 ; 38 ; 39 } _0x7: RJMP _0x7 _getchar: sbis usr,rxc rjmp _getchar in r30,udr RET _putchar: sbis usr,udre rjmp _putchar ld r30,y out udr,r30 ADIW R28,1 RET _itoa: ld r26,y+ ld r27,y+ ld r30,y+ ld r31,y+ adiw r30,0 brpl __itoa0 com r30 com r31 adiw r30,1 ldi r22,'-' st x+,r22 __itoa0: clt ldi r24,low(10000) ldi r25,high(10000) rcall __itoa1 ldi r24,low(1000) ldi r25,high(1000) rcall __itoa1 ldi r24,100 clr r25 rcall __itoa1 ldi r24,10 rcall __itoa1 mov r22,r30 rcall __itoa5 clr r22 st x,r22 ret __itoa1: clr r22 __itoa2: cp r30,r24 cpc r31,r25 brlo __itoa3 inc r22 sub r30,r24 sbc r31,r25 brne __itoa2 __itoa3: tst r22 brne __itoa4 brts __itoa5 ret __itoa4: set __itoa5: subi r22,-0x30 st x+,r22 ret .equ __lcd_direction=__lcd_port-1 .equ __lcd_pin=__lcd_port-2 .equ __lcd_rs=0 .equ __lcd_rd=1 .equ __lcd_enable=2 .equ __lcd_busy_flag=7 .DSEG __base_y_G4: .BYTE 0x4 .CSEG __lcd_ready: in r26,__lcd_direction andi r26,0xf ;set as input out __lcd_direction,r26 sbi __lcd_port,__lcd_rd ;RD=1 cbi __lcd_port,__lcd_rs ;RS=0 __lcd_busy: rcall __lcd_delay sbi __lcd_port,__lcd_enable ;EN=1 rcall __lcd_delay in r26,__lcd_pin cbi __lcd_port,__lcd_enable ;EN=0 rcall __lcd_delay sbi __lcd_port,__lcd_enable ;EN=1 rcall __lcd_delay cbi __lcd_port,__lcd_enable ;EN=0 sbrc r26,__lcd_busy_flag rjmp __lcd_busy RET __lcd_write_nibble: andi r26,0xf0 or r26,r27 out __lcd_port,r26 ;write sbi __lcd_port,__lcd_enable ;EN=1 rcall __lcd_delay cbi __lcd_port,__lcd_enable ;EN=0 __lcd_delay: ldi r31,15 __lcd_delay0: dec r31 brne __lcd_delay0 ret __lcd_write_data: cbi __lcd_port,__lcd_rd ;RD=0 in r26,__lcd_direction ori r26,0xf0 | (1<<__lcd_rs) | (1<<__lcd_rd) | (1<<__lcd_enable) ;set as output out __lcd_direction,r26 in r27,__lcd_port andi r27,0xf ld r26,y rcall __lcd_write_nibble ;RD=0, write MSN ld r26,y swap r26 rcall __lcd_write_nibble ;write LSN sbi __lcd_port,__lcd_rd ;RD=1 ADIW R28,1 RET __lcd_read_nibble: sbi __lcd_port,__lcd_enable ;EN=1 rcall __lcd_delay in r30,__lcd_pin ;read cbi __lcd_port,__lcd_enable ;EN=0 rcall __lcd_delay andi r30,0xf0 ret _lcd_read_byte0_G4: rcall __lcd_delay rcall __lcd_read_nibble ;read MSN mov r26,r30 rcall __lcd_read_nibble ;read LSN cbi __lcd_port,__lcd_rd ;RD=0 swap r30 or r30,r26 RET _lcd_gotoxy: CALL __lcd_ready LD R30,Y LDI R31,0 SUBI R30,LOW(-__base_y_G4) SBCI R31,HIGH(-__base_y_G4) LD R30,Z LDD R26,Y+1 ADD R30,R26 ST -Y,R30 CALL __lcd_write_data LDD R6,Y+1 LDD R7,Y+0 ADIW R28,2 RET _lcd_clear: CALL __lcd_ready LDI R30,LOW(2) CALL SUBOPT_0x1 LDI R30,LOW(12) CALL SUBOPT_0x1 LDI R30,LOW(1) ST -Y,R30 CALL __lcd_write_data LDI R30,LOW(0) MOV R7,R30 MOV R6,R30 RET _lcd_putchar: push r30 push r31 ld r26,y set cpi r26,10 breq __lcd_putchar1 clt INC R6 CP R8,R6 BRSH _0x9 __lcd_putchar1: INC R7 LDI R30,LOW(0) ST -Y,R30 ST -Y,R7 CALL _lcd_gotoxy brts __lcd_putchar0 _0x9: rcall __lcd_ready sbi __lcd_port,__lcd_rs ;RS=1 ld r26,y st -y,r26 rcall __lcd_write_data __lcd_putchar0: pop r31 pop r30 ADIW R28,1 RET _lcd_puts: ldd r31,y+1 ld r30,y __lcd_puts0: ld r26,z+ tst r26 breq __lcd_puts1 st -y,r26 rcall _lcd_putchar rjmp __lcd_puts0 __lcd_puts1: ADIW R28,2 RET _lcd_putsf: ld r30,y ldd r31,y+1 __lcd_putsf0: lpm tst r0 breq __lcd_putsf1 adiw r30,1 st -y,r0 rcall _lcd_putchar rjmp __lcd_putsf0 __lcd_putsf1: ADIW R28,2 RET __long_delay_G4: clr r26 clr r27 __long_delay0: sbiw r26,1 ;2 cycles brne __long_delay0 ;2 cycles RET __lcd_init_write_G4: cbi __lcd_port,__lcd_rd ;RD=0 in r26,__lcd_direction ori r26,0xf7 ;set as output out __lcd_direction,r26 in r27,__lcd_port andi r27,0xf ld r26,y rcall __lcd_write_nibble ;RD=0, write MSN sbi __lcd_port,__lcd_rd ;RD=1 ADIW R28,1 RET _lcd_init: cbi __lcd_port,__lcd_enable ;EN=0 cbi __lcd_port,__lcd_rs ;RS=0 LDD R8,Y+0 LD R30,Y SUBI R30,-LOW(128) __PUTB1MN __base_y_G4,2 LD R30,Y SUBI R30,-LOW(192) __PUTB1MN __base_y_G4,3 CALL SUBOPT_0x2 CALL SUBOPT_0x2 CALL SUBOPT_0x2 CALL __long_delay_G4 LDI R30,LOW(32) ST -Y,R30 CALL __lcd_init_write_G4 CALL __long_delay_G4 LDI R30,LOW(40) CALL SUBOPT_0x3 LDI R30,LOW(4) CALL SUBOPT_0x3 LDI R30,LOW(133) CALL SUBOPT_0x3 in r26,__lcd_direction andi r26,0xf ;set as input out __lcd_direction,r26 sbi __lcd_port,__lcd_rd ;RD=1 CALL _lcd_read_byte0_G4 CPI R30,LOW(0x5) BREQ _0xA LDI R30,LOW(0) RJMP _0xB _0xA: CALL __lcd_ready LDI R30,LOW(6) ST -Y,R30 CALL __lcd_write_data CALL _lcd_clear LDI R30,LOW(1) _0xB: ADIW R28,1 RET ;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES SUBOPT_0x0: ST -Y,R30 LDI R30,LOW(0) ST -Y,R30 JMP _lcd_gotoxy ;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES SUBOPT_0x1: ST -Y,R30 CALL __lcd_write_data JMP __lcd_ready ;OPTIMIZER ADDED SUBROUTINE, CALLED 3 TIMES SUBOPT_0x2: CALL __long_delay_G4 LDI R30,LOW(48) ST -Y,R30 JMP __lcd_init_write_G4 ;OPTIMIZER ADDED SUBROUTINE, CALLED 3 TIMES SUBOPT_0x3: ST -Y,R30 CALL __lcd_write_data JMP __long_delay_G4 ;END OF CODE MARKER __END_OF_CODE: